Exemplary embodiments relate generally to a nonvolatile memory device, and more particularly to a circuit for supplying well voltages in a nonvolatile memory device.
Electrically programmable and erasable nonvolatile memory devices which can retain data even without supply of power are increasingly in demand. High integration of memory cells is then necessary to develop high-capacity memory devices capable of storing a large amount of data. A nonvolatile memory device includes a number of memory cells coupled in series together to form one cell string. And a number of the cell strings form a memory cell array.
The cell string in a nonvolatile memory device has a structure in which a number of memory cells are coupled between a bit line and a source line. Because of the string structure, the number of contacts between the bit line and the source line can be reduced and so the size of a memory cell can be reduced, thereby enabling high-capacity memory devices. The above string structure, however, is disadvantageous in that the access speed is slow because the cell current of a memory cell becomes very low as the size of the memory cell is reduced.
Unlike a typical memory device, a memory cell in a nonvolatile memory device can store data of 2 bits or more (i.e., a multi-level form). That is, the memory cell in a nonvolatile memory device can store data of various states by differently controlling the amount of a threshold voltage through control of the amount of charges trapped at the floating gate of the memory cell.